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september 2013 doc id 16185 rev 3 1/35 1 L9953LXP door actuator driver features three half bridges for 0.75a loads (r dson =1600m ) two configurable high side driver for up to 1.5a load (r dson =500m ) or 0.35a load (r on =1800m ) one full bridge for 6a load (r on =150m ) one highside driver for 6a load (r on =100m ) programmable soft start function to drive loads with higher inrush currents (i.e. current >6a, >1.5a) very low current consumption in standby mode (i s < 6a typ; t j 85 c) all outputs short circuit protected current monitor output for highside out1, out4, out5 and out8 all outputs over temperature protected open-load diagnostic for all outputs overload diagnostic for all outputs separated half bridges for door lock motor pwm control of all outputs charge pump output for reverse polarity protection applications door actuator driver with bridges for door lock, mirror axis control, mirror fold and highside driver for mirror defroster and two 10w-light bulbs and/or leds. description the L9953LXP is a microcontroller driven multifunctional door actuator driver for automotive applications. up to three dc motors and three grounded resistive loads can be driven with five half bridges and three highside drivers. the integrated standard serial peripheral interface (spi) controls all operation modes (forward, reverse, brake and high impedance). all diagnostic informations are available via spi. powersso-36 table 1. device summary package order codes tube tape and reel powersso-36 L9953LXP L9953LXPtr www.st.com
contents L9953LXP 2/35 doc id 16185 rev 3 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.5 spi - electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 dual power supply: vs and vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.2 standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.3 inductive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4 diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.5 overvoltage and under voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.6 charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.7 temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . 21 3.8 open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.9 over load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.10 current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.11 pwm inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.12 cross-current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.13 programmable soft start function to drive loads with higher inrush current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4 functional description of the spi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 serial peripheral interface (spi) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.2 chip select not (csn) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.3 serial data in (di) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.4 serial data out (do) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.5 serial clock (clk) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.6 input data register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
L9953LXP contents doc id 16185 rev 3 3/35 4.7 status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.8 spi - input data and status registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5 packages thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6.2 powersso-36 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6.3 powersso-36 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
list of tables L9953LXP 4/35 doc id 16185 rev 3 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. operating junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 7. supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. overvoltage and under voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 9. current monitor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 10. charge pump output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 11. out1 - out8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 12. delay time from standby to active mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 13. inputs: csn, clk, pwm1/2 and di . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 14. di timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 15. do . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 16. do timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 17. csn timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 18. spi - input data and status registers 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 19. spi - input data and status registers 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 20. powersso-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 21. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
L9953LXP list of figures doc id 16185 rev 3 5/35 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 3. spi - transfer timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 4. spi - input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 5. spi - do valid data delay time and valid time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 6. spi - do enable and disable time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 7. spi - driver turn on / off timing, minimum csn hi time . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 8. spi - timing of status bit 0 (fault condition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 9. programmable soft start function for inductive loads and incandescent bulbs . . . . . . . . . . 23 figure 10. packages thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 11. powersso-36 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 12. powersso-36 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 13. powersso-36 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
block diagram and pin description L9953LXP 6/35 doc id 16185 rev 3 1 block diagram and pin description figure 1. block diagram table 2. pin definitions and functions pin symbol function 1, 18, 19, 36 gnd ground: reference potential. important: for the capability of driving the full current at the outputs all pins of gnd must be externally connected. 2, 35 out8 highside-driver-output 8 the output is built by a highside switch and is intended for resistive loads, hence the internal reverse diode from gnd to the output is missing. for esd reason a diode to gnd is present but the energy which can be dissipated is limited. the highside driver is a power dmos transistor with an internal parasitic reverse diode from the output to vs (bulk-drain-diode). the output is over-current and open- load protected. important: for the capability of driving the full current at the outputs both pins of out8 must be externally connected. out1 driver interface & diagnostic out2 out3 out4 out5 out8 m m m spi interface charge pump pwm2 / cm csn clk do di vs vcc vcc v bat c gnd mirror common mirror vertical mirror horizontal lock / folder 1k mux 4 defroster pwm1 out6 out7 1k 1k 1k 1k 1k 100k 10k * note: value of capacitor has to be choosen carefully to limit the vs voltage below absolute maximum ratings in case of an unexpected freewheeling condition (e.g. tsd, por) * ** note: resistors between c and L9953LXP are recommended to limit currents for negative voltage transients at vbat (e.g. iso type 1 pulse) reverse polarity protection ** ** ** ** ** ** 100f programmable bulb (10w) or led mode
L9953LXP block diagram and pin description doc id 16185 rev 3 7/35 3 4 5 out1 out2 out3 half-bridge-output 1,2,3 the output is built by a highside and a lowside switch, which are internally connected. the output stage of both switches is a power dmos transistor. each driver has an internal parasitic reverse diode (bulk-drain-diode: highside driver from output to vs, lowside driver from gnd to output). this output is over-current and open-load protected. 6, 7, 14, 15, 23, 25, 28, 32 vs power supply voltage (external reverse protection required) for this input a ceramic capacitor as close as possible to gnd is recommended. important: for the capability of driving the full current at the outputs all pins of vs must be externally connected. 8di serial data input the input requires cmos logic levels and receives serial data from the microcontroller. the data is an 24bit control word and the least significant bit (lsb, bit 0) is transferred first. 9 cm/pwm2 current monitor output/pwm2 input depending on the selected multiplexer bits of input data register this output sources an image of the instant current through the corresponding highside driver with a ratio of 1/10.000. this pin is bidirectional. the microcontroller can overdrive the current monitor signal to provide a second pwm input for the output out7. 10 csn chip select not input / test mode this input is low active and requires cmos logic levels. the serial data transfer between L9953LXP and micro controller is enabled by pulling the input csn to low level. if an input voltage of more than 7.5v is applied to csn pin the L9953LXP will be switched into a test mode. 11 do serial data output the diagnosis data is available via the spi and this 3-state output. the output will remain in 3-state, if the chip is not selected by the input csn (csn = high) 12 vcc logic supply voltage for this input a ceramic capacitor as close as possible to gnd is recommended. 13 clk serial clock input this input controls the internal shift register of the spi and requires cmos logic levels. 16, 17, 20, 21 out4 out5 half-bridge-output 4,5: see out1 (pin 3). important: for the capability of driving the full current at the outputs both pins of out4 (out5, respectively) must be externally connected. 26 cp charge pump output this output is provided to drive the gate of an external n-channel powermos used for reverse polarity protection 27 pwm1 pwm1 input: this input signal can be used to control the drivers out1-out6 and out8 by an external pwm signal. table 2. pin definitions and functions (continued) pin symbol function
block diagram and pin description L9953LXP 8/35 doc id 16185 rev 3 figure 2. configuration diagram (top view) 31 33 out6, out7 highside-driver-output 6,7: each output is built by a highside switch and is intended for resistive loads, hence the internal reverse diode from gnd to the output is missing. for esd reason a diode to gnd is present but the energy which can be dissipated is limited. each highside driver is a power dmos transistor with an internal parasitic reverse diode from each output to vs (bulk-drain-diode). each output is over-current and open- load protected. 22, 24, 29, 30, 34 nc not connected pins. table 2. pin definitions and functions (continued) pin symbol function out4 nc gnd 1 out8 2 out1 3 4 5 d i 6 cm / pwm2 7 8 d o 9 vcc 10 11 vs 12 v s o ut4 14 vs 15 vs 16 17 18 gnd 36 o ut6 35 nc 34 o ut8 33 32 pwm1 31 nc 30 29 cp 28 vs 27 nc 26 vs 25 nc 24 o ut5 23 o ut5 22 gnd 21 vs 20 o ut7 19 vs out3 out2 csn gnd 1 3 clk powersso-36
L9953LXP electrical specifications doc id 16185 rev 3 9/35 2 electrical specifications 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality document 2.2 esd protection 2.3 thermal data table 3. absolute maximum ratings symbol parameter value unit v s dc supply voltage -0.3 to28 v single pulse t max < 400ms 40 v v cc stabilized supply voltage, logic supply -0.3 to 5.5 v v di , v do, v clk , v csn, v pwm1 digital input / output voltage -0.3 to v cc + 0.3 v v cm current monitor output -0.3 to v cc + 0.3 v v cp charge pump output -25 to v s + 11 v i out1,2,3,6,7 output current 5 a i out4,5,8 output current 10 a table 4. esd protection parameter value unit all pins 2 (1) 1. hbm according to mil 883c, method 3015.7 or eia/jesd22-a114-a. kv output pins: out1 - out8 8 (2) 2. hbm with all unzapped pins grounded. kv table 5. operating junction temperature symbol parameter value unit t j operating junction temperature -40 to 150 c
electrical specifications L9953LXP 10/35 doc id 16185 rev 3 2.4 electrical characteristics v s = 8 to 16v, v cc = 4.5 to 5.3v, t j = - 40 to 150c, unless otherwise specified. the voltages are referred to gnd and currents are assumed positive, when the current flows into the pin. table 6. temperature warning and thermal shutdown symbol parameter min. typ. max. unit t jtw on temperature warning threshold junction temperature t j 130 150 c t jsd on thermal shutdown threshold junction temperature t j increasing 170 c t jsd off thermal shutdown threshold junction temperature t j decreasing 150 c t jsd hys thermal shutdown hysteresis 5 k table 7. supply symbol parameter test condition min. typ. max. unit v s operating supply voltage range 728v i s v s dc supply current v s = 16v, v cc = 5.3v active mode out1 - out8 floating 720ma v s quiescent supply current v s = 16v, v cc = 0v standby mode out1 - out8 floating t test = -40c, 25c 412a t test = 85c (1) 1. guaranteed by design. 625a i cc v cc dc supply current v s = 16v, v cc = 5.3v csn = v cc , active mode 13ma v cc quiescent supply current v s = 16v, v cc = 5.3v csn = v cc standby mode out1 - out8 floating 25 50 a i s + i cc sum quiescent supply current v s = 16v, v cc = 5.3v csn = v cc standby mode out1 - out8 floating t test = 130c 50 200 a
L9953LXP electrical specifications doc id 16185 rev 3 11/35 table 8. overvoltage and under voltage detection symbol parameter test condition min. typ. max unit v suv on vs uv-threshold voltage v s increasing 5.7 7.2 v v suv off vs uv-threshold voltage v s decreasing 5.5 6.9 v v suv hyst vs uv-hysteresis v suv on - v suv off 0.5 v v sov off vs ov-threshold voltage v s increasing 18 24.5 v v sov on vs ov-threshold voltage v s decreasing 17.5 23.5 v v sov hyst vs ov-hysteresis v sov off - v sov on 1v v por off power-on reset threshold v cc increasing 4.4 v v por on power-on reset threshold v cc decreasing 3.1 v v por hyst power-on reset hysteresis v por off - v por on 0.3 v table 9. current monitor output symbol parameter test condition min. typ. max. unit v cm functional voltage range v cc = 5v 0 4 v i cm,r current monitor output ratio: i cm /i out 4,5,8 0v v cm 4v, v cc =5v - current monitor output ratio: i cm /i out1 - i cm acc current monitor accuracy acc i cm /i out 4,5,8 0 v v cm 3.8v, v cc = 5v, i out,min 4,5,8 = 0.5a, i out max 4,5,8 = 5.9a 4% + 1%fs 8% + 2%fs - current monitor accuracy acc i cm /i out 1 0 v v cm 3.8v, v cc = 5v, i out,min 1 = 60ma, i out max 1 = 0.6a table 10. charge pump output symbol parameter test condition min. typ. max. unit v cp charge pump output voltage v s = 8v, i cp = -60a v s +6 v s +13 v v s = 10v, i cp = -80a v s +8 v s +13 v v s 12v, i cp = -100a v s +10 v s +13 v i cp charge pump output current v cp = v s +10v, v s =13.5v 95 150 300 a 1 10000 ---------------- 1 4000 ------------ -
electrical specifications L9953LXP 12/35 doc id 16185 rev 3 table 11. out1 - out8 symbol parameter test condition min. typ. max. unit r dson out1, r dson out2 r dson out3 on resistance to supply or gnd v s = 13.5 v, t j = 25 c, i out1,2,3 = 0.4a 1600 2200 m v s = 13.5 v, t j = 125 c, i out1,2,3 = 0.4 a 2500 3400 m r dson out4, r dson out5 on resistance to supply or gnd v s = 13.5 v, t j = 25 c, i out4,5 = 3 a 150 200 m v s = 13.5 v, t j = 125 c, i out4,5 = 3 a 225 300 m r dson out6, r dson out7 on resistance to supply in low r dson mode vs = 13.5 v, t j = 25 c, i out6,7 = ? 0.8a 500 700 m v s = 13.5 v, t j = 125 c, i out6,7 = ?0.8 a 700 950 m on resistance in high r dson mode t j = 25 c, i out6,7 = - 0.2 a 1800 2500 m t j = 125 c,i out6,7 = - 0.2 a 2700 3700 m r dson out8 on resistance to supply v s = 13.5 v, t j = 25 c, i out8 = -3 a 100 150 m v s = 13.5 v, t j = 125 c, i out8 = -3 a 150 200 m i out1 i out2 i out3 output current limitation to gnd source, v s =13.5 v -1.25 -0.75 a i out1 i out2 i out3 output current limitation to supply sink, v s =13.5 v 0.75 1.25 a i out4 i out5 output current limitation to gnd source, v s =13.5 v -10.5 -6 a i out4 i out5 output current limitation to supply sink, v s =13.5 v 6 10.5 a i out6 i out7 output current limitation to gnd source, v s =13.5 v -3.0 -1.4 a output current limitation to gnd in high r dson mode -0.65 -0.35 a
L9953LXP electrical specifications doc id 16185 rev 3 13/35 i out8 output current limitation to gnd source, v s =13.5 v -10.5 -6 a t d on h output delay time, highside driver on v s =13.5 v, rload= (1) corresponding lowside driver is not active 10 40 80 s t d off h output delay time, highside driver off v s =13.5 v, rload= (1) 15 150 300 s t d on l output delay time, lowside driver on v s =13.5 v, rload= (1) corresponding highside driver is not active 15 30 70 s t d off l output delay time, lowside driver off v s =13.5 v, rload= (1) 20 100 200 s t d hl cross current protection time, source to sink t cc onls_offhs - t d off h (2) 200 400 s t d lh cross current protection time, sink to source t cc onhs_offls - t d off l (2) 200 400 s i qlh switched off output current highside drivers of out1-8 v out1-8 =0v, standby mode -3 0 3 a v out1-2-3-4-5-8 =0v, active mode -40 -15 0 a v out6-7 =0v, active mode -10 -8 0 a i qll switched off output current lowside drivers of out1-5 v out1-5 = v s , standby mode 0 80 120 a v out1-5 = v s , active mode -40 -15 0 a i old123 open-load detection current of out1, out2 and out3 source and sink 10 20 30 ma i old45 open-load detection current of out4 and out5 source and sink 60 150 300 ma i old67 open-load detection current of out6 and out7 source 15 40 60 ma open-load detection current of out6 and out7 in high r dson mode 51015ma i old8 open-load detection current of out8 source 30 150 300 ma t d ol minimum duration of open-load condition to set the status bit 500 3000 s t isc minimum duration of over- current condition to switch off the driver 10 100 s table 11. out1 - out8 (continued) symbol parameter test condition min. typ. max. unit
electrical specifications L9953LXP 14/35 doc id 16185 rev 3 f rec0 recovery frequency for oc recovery duty cycle bit=0 28khz f rec1 recovery frequency for oc recovery duty cycle bit=1 316khz dv out123 /dt dv out67 /dt slew rate of out 123 and out 67 v s =13.5 v, rload= (1) 0.1 0.4 0.9 v/s dv out45 /dt slew rate of out 4 and out 5 v s =13.5 v, rload= (1) 0.08 0.2 0.4 v/s dv out8 /dt slew rate of out 8 v s =13.5 v, rload= (1) 0.08 0.2 0.4 v/s 1. out1,2,3 32ohm out4,5 4ohm out6,7 16ohm out6,7 high rdson mode 63ohm out8 4ohm 2. t cc on is the switch on delay time t d on if complement in half bridge has to switch off. table 11. out1 - out8 (continued) symbol parameter test condition min. typ. max. unit
L9953LXP electrical specifications doc id 16185 rev 3 15/35 2.5 spi - electrical characteristics v s = 8 to 16v, v cc = 4.5 to 5.3v, t j = - 40 to 150c, unless otherwise specified. the voltages are referred to gnd and currents are assumed positive, when the current flows into the pin). table 12. delay time from standby to active mode symbol parameter test condition min. typ. max. unit t set delay time switching from standby to active mode. time until output drivers are enabled 160 300 s table 13. inputs: csn, clk, pwm1/2 and di symbol parameter test condition min. typ. max. unit v inl input low level v cc = 5v 1.5 2.0 v v inh input high level v cc = 5v 3.0 3.5 v v inhyst input hysteresis v cc = 5v 0.5 v i csn in pull up current at input csn v csn = 3.5v v cc = 5v -40 -20 -5 a i clk in pull down current at input clk v clk = 1.5v 10 25 50 a i di in pull down current at input di v di = 1.5v 10 25 50 a i pwm1 in pull down current at input pwm1 v pwm = 1.5v 10 25 50 a c in (1) 1. value of input capacity is not measured in production test. parameter guaranteed by design. input capacitance at input csn, clk, di and pwm1/2 0 v < v cc < 5.3v 10 15 pf table 14. di timing (1) 1. di timing parameters tested in production by a passed / failed test: tj= -40c / +25c: spi communication @ 2mhz. tj= +125c spi communication @ 1.25 mhz. symbol parameter test condition min. typ. max. unit t clk clock period v cc = 5v 1000 ns t clkh clock high time v cc = 5v 400 ns t clkl clock low time v cc = 5v 400 ns t set csn csn setup time, csn low before rising edge of clk v cc = 5v 400 ns t set clk clk setup time, clk high before rising edge of csn v cc = 5v 400 ns t set di di setup time v cc = 5v 200 ns t hold time di hold time v cc = 5v 200 ns t r in rise time of input signal di, clk, csn v cc = 5v 100 ns t f in fall time of input signal di, clk, csn v cc = 5v 100 ns
electrical specifications L9953LXP 16/35 doc id 16185 rev 3 table 15. do symbol parameter test condition min. typ. max. unit v dol output low level vcc = 5 v, i d = -2ma 0.2 0.4 v v doh output high level vcc = 5 v, i d = 2 ma v cc -0.4 v cc -0.2 v i dolk 3-state leakage current v csn = v cc , 0v < v do < v cc -10 10 a c do (1) 1. value of input capacity is not measured in production test. parameter guaranteed by design. 3-state input capacitance v csn = v cc , 0v < v cc < 5.3v 10 15 pf table 16. do timing symbol parameter test condition min. typ. max. unit t r do do rise time c l = 100 pf, i load = -1ma 80 140 ns t f do do fall time c l = 100 pf, i load = 1ma 50 100 ns t en do tri l do enable time from 3-state to low level c l = 100 pf, i load = 1ma pull-up load to v cc 100 250 ns t dis do l tri do disable time from low level to 3-state c l = 100 pf, i load = 4 ma pull-up load to v cc 380 450 ns t en do tri h do enable time from 3-state to high level c l =100 pf, i load = -1ma pull-down load to gnd 100 250 ns t dis do h tri do disable time from high level to 3-state c l = 100 pf, i load = -4ma pull-down load to gnd 380 450 ns t d do do delay time v do < 0.3 v cc , v do > 0.7v cc , c l = 100pf 50 250 ns table 17. csn timing symbol parameter test condition min. typ. max. unit t csn_hi,stb csn hi time, switching from standby mode transfer of spi command to input register 20 s t csn_hi,min csn hi time, active mode transfer of spi command to input register 4s
L9953LXP electrical specifications doc id 16185 rev 3 17/35 figure 3. spi - transfer timing diagram figure 4. spi - input timing 1234567 0 01 1234567 0 1234567 0 01 01 csn clk di do input data register csn high to low: do enabled time di: data will be accepted on the rising edge of clk signal time time time time do: data will change on the falling edge of clk signal fault bit csn low to high: actual data is transfered to output power switches old data new data 23 22 21 20 19 18 23 22 21 20 19 18 23 22 21 20 19 18 x x x x x x 1234567 0 01 1234567 0 1234567 0 01 1234567 0 1234567 0 01 01 csn clk di do input data register csn high to low: do enabled time di: data will be accepted on the rising edge of clk signal time time time time do: data will change on the falling edge of clk signal fault bit csn low to high: actual data is transfered to output power switches old data new data 1234567 0 01 01 csn clk di do input data register csn high to low: do enabled time di: data will be accepted on the rising edge of clk signal time time time time do: data will change on the falling edge of clk signal fault bit csn low to high: actual data is transfered to output power switches old data new data 23 22 21 20 19 18 23 22 21 20 19 18 23 22 21 20 19 18 x x x x x x 0.8 vcc 0.8 vcc 0.8 vcc 0.2 vcc 0.2 vcc 0.2 vcc valid va l id csn clk di t set csn t clkh t se t clk t clkl t hold di t set di
electrical specifications L9953LXP 18/35 doc id 16185 rev 3 figure 5. spi - do valid data delay time and valid time figure 6. spi - do enable and disable time 0 . 8 v cc 0 . 8 v cc 0 . 8 v cc 0 . 2 v c c 0 . 2 v c c 0 . 2 v cc c l k do ( l o w t o h i g h ) do (high to lo w ) 0 . 5 v cc t r in t r d o t f do t d do t f i n csn t f in r in t do do en do tri l t t dis do l tri 50% 0.8 vcc 0.2 vcc 50% 50% en do tri h t t dis do h tri c = 100 pf l c = 100 pf l pull-up load to vcc pull-down load to gnd
L9953LXP electrical specifications doc id 16185 rev 3 19/35 figure 7. spi - driver turn on / off timing, minimum csn hi time figure 8. spi - timing of st atus bit 0 (fault condition) c s n don t 20 % 8 0 % t r in f i n t off t d o f f t off s t ate o n s t a t e o f f s t a t e on s t a t e o n t o u t p u t c u r r e n t o f a d r iv e r 5 0 % 5 0 % 8 0 % 2 0 % 20 % 80 % 5 0 % o u t p u t c u r r e n t o f a d r iv e r csn lo w t o h igh : d ata f r o m s h i f t registe r is t r ansfe r r e d t o outpu t po w e r s w i t c h es t csn_hi,min output voltage of a driver output voltage of a driver csn clk di do csn high to low and clk stays low: status information of data bit 0 (fault condition) is transfered to do di: data is not accepted do: status information of data bit 0 (fault condition) will stay as long as csn is low time time time time 0 -
application information L9953LXP 20/35 doc id 16185 rev 3 3 application information 3.1 dual power supply: v s and v cc the power supply voltage v s supplies the half bridges and the highside drivers. an internal charge-pump is used to drive the highside switches. the logic supply voltage v cc (stabilized 5 v) is used for the logic part and the spi of the device. due to the independent logic supply voltage the control and status information will not be lost, if there are temporary spikes or glitches on the power supply voltage. in case of power- on (v cc increases from under voltage to v por off = 4.2 v) the circuit is initialized by an internally generated power-on-reset (por). if the voltage v cc decreases under the minimum threshold (v por on = 3.4 v), the outputs are switched to 3-state (high impedance) and the status registers are cleared. 3.2 standby mode the standby mode of the L9953LXP is activated by clearing the bit 23 of the input data register 0. all latched data will be cleared and the inputs and outputs are switched to high impedance. in the standby mode the current at v s (v cc ) is less than 6 a (50a) for csn = high (do in 3-state). by switching the v cc voltage a very low quiescent current can be achieved. if bit 23 is set, the device will be switched to active mode. 3.3 inductive loads each half bridge is built by an internally connected highside and a lowside power dmos transistor. due to the built-in reverse diodes of the output transistors, inductive loads can be driven at the outputs out1 to out5 without external free-wheeling diodes. the highside drivers out6 to out8 are intended to drive resistive loads. hence only a limited energy (e<1mj) can be dissipated by the internal esd diodes in freewheeling condition. for inductive loads (l>100h) an external free-wheeling diode connected to gnd and the corresponding output is needed. 3.4 diagnostic functions all diagnostic functions (over/open-load, power supply over-/under voltage, temperature warning and thermal shutdown) are internally filtered and the condition has to be valid for at least 32 s (open-load: 1ms, respectively) before the corresponding status bit in the status registers will be set. the filters are used to improve the noise immunity of the device. open- load and temperature warning function are intended for information purpose and will not change the state of the output drivers. on contrary, the overload condition will disable the corresponding driver (over-current) and overtemperature will switch off all drivers (thermal shutdown). without setting the over-current recovery bits in the input data register, the microcontroller has to clear the over-current status bits to reactivate the corresponding drivers.
L9953LXP application information doc id 16185 rev 3 21/35 3.5 overvoltage and under voltage detection if the power supply voltage v s rises above the overvoltage threshold v sov off (typical 21 v), the outputs out1 to out8 are switched to high impedance state to protect the load. when the voltage v s drops below the under voltage threshold v suv off (uv-switch-off voltage), the output stages are switched to the high impedance to avoid the operation of the power devices without sufficient gate driving voltage (increased power dissipation). if the supply voltage v s recovers to normal operating voltage the outputs stages return to the programmed state (input register 0: bit 20=0). if the under voltage/overvoltage recovery disable bit is set, the automatic turn-on of the drivers is deactivated. the microcontroller needs to clear the status bits to reactivate the drivers. it is recommended to set bit 20 to avoid a possible high current oscillation in case of a shorted output to gnd and low battery voltage. 3.6 charge pump the charge pump runs under all conditions in normal mode. in standby the charge pump is disabled. 3.7 temperature warning and thermal shutdown if junction temperature rises above t j tw a temperature warning flag is set and is detectable via the spi. if junction temperature increases above the second threshold t j sd , the thermal shutdown bit will be set and power dmos transistors of all output stages are switched off to protect the device. temperature warning flag and thermal shutdown bit are latched and must be cleared by the microcontroller. the related bit is only cleared if the temperature decreases below the trigger temperature. if the thermal shutdown bit has been cleared the output stages are reactivated. 3.8 open-load detection the open-load detection monitors the load current in each activated output stage. if the load current is below the open-load detection threshold for at least 1 ms (t dol ) the corresponding open-load bit is set in the status register. due to mechanical/electrical inertia of typical loads a short activation of the outputs (e.g. 3ms) can be used to test the open-load status without changing the mechanical/electrical state of the loads. 3.9 over load detection in case of an over-current condition a flag is set in the status register in the same way as open-load detection. if the over-current signal is valid for at least t isc = 32 s, the over- current flag is set and the corresponding driver is switched off to reduce the power dissipation and to protect the integrated circuit. if the over-current recovery bit of the output is zero the microcontroller has to clear the status bits to reactivate the corresponding driver.
application information L9953LXP 22/35 doc id 16185 rev 3 3.10 current monitor the current monitor output sources a current image at the current monitor output which has a fixed ratio (1/10000) of the instantaneous current of the selected highside driver. the bits 18 and 19 of the input data register 0 control which of the outputs out1, out4, out5, and out8 will be multiplexed to the current monitor output. the current monitor output allows a more precise analysis of the actual state of the load rather than the detection of an open- or overload condition. for example this can be used to detect the motor state (starting, free- running, stalled). moreover, it is possible to regulate the power of the defroster more precise by measuring the load current. the current monitor output is bidirectional (c.f. pwm inputs). 3.11 pwm inputs each driver has a corresponding pwm enable bit which can be programmed by the spi interface. if the pwm enable bit in input data register 1 is set, the output is controlled by the logically and-combination of the pwm signal and the output control bit in input data register 0. the outputs out1-out6 and out8 are controlled by the pwm1 input and the output out7 is controlled by the bidirectional input cm/pmw2. for example, the two pwm inputs can be used to dim two lamps independently by external pwm signals. 3.12 cross-current protection the six half-bridges of the device are cross-current protected by an internal delay time. if one driver (ls or hs) is turned-off the activation of the other driver of the same half bridge will be automatically delayed by the cross-current protection time. after the cross-current protection time is expired the slew-rate limited switch-off phase of the driver will be changed to a fast turn-off phase and the opposite driver is turned-on with slew-rate limitation. due to this behavior it is always guaranteed that the previously activated driver is totally turned-off before the opposite driver will start to conduct.
L9953LXP application information doc id 16185 rev 3 23/35 3.13 programmable soft start function to drive loads with higher inrush current loads with start-up currents higher than the over-current limits (e.g. inrush current of lamps, start current of motors and cold resistance of heaters) can be driven by using the programmable soft start function (i.e. overcurrent recovery mode). each driver has a corresponding over-current recovery bit. if this bit is set, the device will automatically switch- on the outputs again after a programmable recovery time. the duty cycle in over-current condition can be programmed by the spi interface to be about 12% or 25%. the pwm modulated current will provide sufficient average current to power up the load (e.g. heat up the bulb) until the load reaches operating condition. the pwm frequency settles at 3khz or 6khz. the device itself cannot distinguish between a real overload and a non linear load like a light bulb. a real overload condition can only be qualified by time. as an example the microcontroller can switch on light bulbs by setting the over-current recovery bit for the first 50ms. after clearing the recovery bit the output will be automatically disabled if the overload condition still exits. figure 9. programmable soft start function for inductive loads and incandescent bulbs load current overcurrent detection unlimited inrush current limited inrush current in overcurrent recovery mode with inductive load t load current overcurrent detection unlimited inrush current limited inrush current in overcurrent recovery mode with incandescent bulb t
functional description of the spi L9953LXP 24/35 doc id 16185 rev 3 4 functional description of the spi 4.1 serial peripheral interface (spi) this device uses a standard spi to communicate with a microcontroller. the spi can be driven by a microcontroller with its spi peripheral running in following mode: cpol = 0 and cpha = 0. for this mode, input data is sampled by the low to high transition of the clock clk, and output data is changed from the high to low transition of clk. this device is not limited to microcontroller with a build-in spi. only three cmos-compatible output pins and one input pin will be needed to communicate with the device. a fault condition can be detected by setting csn to low. if csn = 0, the do-pin will reflect the status bit 0 (fault condition) of the device which is a logical-or of all bits in the status registers 0 and 1. the microcontroller can poll the status of the device without the need of a full spi- communication cycle. note: in contrast to the spi-standard the least significant bit (lsb) will be transferred first (see figure 3 ). 4.2 chip select not (csn) the input pin is used to select the serial interface of this device. when csn is high, the output pin (do) will be in high impedance state. a low signal will activate the output driver and a serial communication can be started. the state when csn is going low until the rising edge of csn will be called a communication frame. if the csn-input pin is driven above 7.5v, the L9953LXP will go into a test mode. in the test mode the do will go from 3-state to active mode. 4.3 serial data in (di) the input pin is used to transfer data serial into the device. the data applied to the di will be sampled at the rising edge of the clk signal and shifted into an internal 24 bit shift register. at the rising edge of the csn signal the contents of the shift register will be transferred to data input register. the writing to the selected data input register is only enabled if exactly 24 bits are transmitted within one communication frame (i.e. csn low). if more or less clock pulses are counted within one frame the complete frame will be ignored. this safety function is implemented to avoid an activation of the output stages by a wrong communication frame. note: due to this safety functionality a daisy chaining of spi is not possible. instead, a parallel operation of the spi bus by controlling the csn signal of the connected ics is recommended. 4.4 serial data out (do) the data output driver is activated by a logical low level at the csn input and will go from high impedance to a low or high level depending on the status bit 0 (fault condition). the first rising edge of the clk input after a high to low transition of the csn pin will transfer the
L9953LXP functional description of the spi doc id 16185 rev 3 25/35 content of the selected status register into the data out shift register. each subsequent falling edge of the clk will shift the next bit out. 4.5 serial clock (clk) the clk input is used to synchronize the input and output serial bit streams. the data input (di) is sampled at the rising edge of the clk and the data output (do) will change with the falling edge of the clk signal. 4.6 input data register the device has two input registers. the first bit (bit 0) at the di-input is used to select one of the two input registers. all bits are first shifted into an input shift register. after the rising edge of csn the contents of the input shift register will be written to the selected input data register only if a frame of exact 24 data bits are detected. depending on bit 0 the contents of the selected status register will be transferred to do during the current communication frame. bit 1-17 controls the behavior of the corresponding driver. if bit 23 is zero, the device will go into the standby-mode. the bits 18 and 19 are used to control the current monitor multiplexer. bit 22 is used to reset all status bits in both status registers. the bits in the status registers will be cleared after the current communication frame (rising edge of csn). 4.7 status register this devices uses two status registers to store and to monitor the state of the device. bit 0 is used as a fault bit and is a logical-nor combination of bits 1-22 in both status registers. the state of this bit can be polled by the microcontroller without the need of a full spi communication cycle. if one of the over-current bits is set, the corresponding driver will be disabled. if the over-current recovery bit of the output is not set the microcontroller has to clear the over-current bit to enable the driver. if the thermal shutdown bit is set, all drivers will go into a high impedance state. again the microcontroller has to clear the bit to enable the drivers.
functional description of the spi L9953LXP 26/35 doc id 16185 rev 3 4.8 spi - input data and status registers table 18. spi - input data and status registers 0 bit input register 0 (write) status register 0 (read) name comment name comment 23 enable bit if enable bit is set the device will be switched in active mode. if enable bit is cleared the device go into standby mode and all bits are cleared. after power-on reset device starts in standby mode. always 1 a broken vcc-or spi- connection of the L9953LXP can be detected by the microcontroller, because all 24 bits low or high is not a valid frame. 22 reset bit if reset bit is set both status registers will be cleared after rising edge of csn input. v s overvoltage in case of an overvoltage or undervoltage event the corresponding bit is set and the outputs are deactivated. if vs voltage recovers to normal operating conditions outputs are reactivated automatically (if bit 20 of status register 0 is not set). 21 oc recovery duty cycle this bit defines in combination with the over- current recovery bit (input register 1) the duty cycle in over current condition of an activated driver. v s undervoltage 0: 12% 1: 25% 20 overvoltage/ undervoltage recovery disable if this bit is set the microcontroller has to clear the status register after undervoltage/overvoltage event to enable the outputs. thermal shutdown in case of a thermal shutdown all outputs are switched off. the microcontroller has to clear the tsd bit by setting the reset bit to reactivate the outputs. 19 current monitor select bits depending on combination of bit 18 and 19 the current image (1/10.000) of the selected hs-output will be multi- plexed to the cm output: temperature warning this tw bit is for information purpose only. it can be used for a thermal management by the microcontroller to avoid a thermal shutdown. 18 bit 19 bit 18 output not ready bit after switching the device from standby mode to active mode an internal timer is started to allow charge pump to settle before the outputs can be activated. this bit is cleared automatically after start up time has finished. since this bit is controlled by internal clock it can be used for synchronizing testing events (e.g. measuring filter times). 00 out8 10 out1 01 out5 11 out4
L9953LXP functional description of the spi doc id 16185 rev 3 27/35 17 out8 ? hs on/off if a bit is set the selected output driver is switched on. if the corresponding pwm enable bit is set (input register 1) the driver is only activated if pwm1 (pwm2) input signal is high. the outputs of out1-out5 are half bridges. if the bits of hs- and ls-driver of the same half bridge are set, the internal logic prevents that both drivers of this output stage can be switched on simultaneously in order to avoid a high internal current from vs to gnd. out8 ? hs over-current in case of an over-current event the corresponding status bit is set and the output driver is disabled. if the over-current recovery enable bit is set (input register 1) the output will be automatically reactivated after a delay time resulting in a pwm modulated current with a programmable duty cycle (bit 21). if the over-current recovery bit is not set the microcontroller has to clear the over-current bit (reset bit) to reactivate the output driver. 16 x (don?t care) 0 15 out7 ? hs on/off out7 ? hs over-current 14 out6 ? hs on/off out6 ? hs over-current 13 x (don?t care) 0 12 x (don?t care) 0 11 x (don?t care) 10 out5 ? hs on/off out5 ? hs over-current 9 out5 ? ls on/off out5 ? ls over-current 8 out4 ? hs on/off out4 ? hs over-current 7 out4 ? ls on/off out4 ? ls over-current 6 out3 ? hs on/off out3 ? hs over-current 5 out3 ? ls on/off out3 ? ls over-current 4 out2 ? hs on/off out2 ? hs over-current 3 out2 ? ls on/off out2 ? ls over-current 2 out1 ? hs on/off out1 ? hs over-current 1 out1 ? ls on/off out1 ? ls over-current 0 0 no error bit a logical nor-combination of all bits 1 to 22 in both status registers. table 18. spi - input data and status registers 0 (continued) bit input register 0 (write) status register 0 (read) name comment name comment
functional description of the spi L9953LXP 28/35 doc id 16185 rev 3 table 19. spi - input data and status registers 1 bit input register 1 (write) status register 1 (read) name comment name comment 23 enable bit if enable bit is set the device will be switched in active mode. if enable bit is cleared device goes into standby mode and all bits are cleared. after power-on reset device starts in standby mode. always 1 a broken vcc or spi connection of the L9953LXP can be detected by the microcontroller, because all 24 bits low or high is not a valid frame. 22 out8 oc recovery enable in case of an over-current event the over-current status bit (status register 0) is set and the output is switched off. if the over-current recovery enable bit is set the output will be automatically reactivated after a delay time resulting in a pwm modulated current with a programmable duty cycle (bit 21 of input data register 0). depending on occurrence of over-current event and internal clock phase it is possible that one recovery cycle is executed even if this bit is set to zero. vs overvoltage in case of an overvoltage or under voltage event the corresponding bit is set and the outputs are deactivated. if vs voltage recovers to normal operating conditions outputs are reactivated automatically. 21 0 / 1 vs undervoltage 20 out7 oc recovery enable thermal shutdown in case of a thermal shutdown all outputs are switched off. the microcontroller has to clear the tsd bit by setting the reset bit to reactivate the outputs. 19 out6 oc recovery enable temperature warning the tw bit can be used for thermal management by the microcontroller to avoid a thermal shutdown. the microcontroller has to clear the tw bit. 18 0 / 1 not ready bit after switching the device from standby mode to active mode an internal timer is started to allow charge pump to settle before the outputs can be activated. this bit is only present during start up time since this bit is controlled by internal clock it can be used for synchronizing testing events(e.g. measuring filter times).
L9953LXP functional description of the spi doc id 16185 rev 3 29/35 17 enable high r dson out7 after 50ms the bit can be cleared. if over-current condition still exists, a wrong load can be assumed. out8 ? hs open-load the open-load detection monitors the load current in each activated output stage. if the load current is below the open-load detection threshold for at least 1 ms (t dol ) the corresponding open-load bit is set. due to mechanical/electrical inertia of typical loads a short activation of the outputs (e.g. 3ms) can be used to test the open- load status without changing the mechanical/electrical state of the loads. 16 out5 oc recovery enable 0 15 out4 oc recovery enable out7 ? hs open-load 14 out3 oc recovery enable out6 ? hs open-load 13 out2 oc recovery enable 0 12 out1 oc recovery enable 0 11 out8 pwm1 enable if the pwm1/2 enable bit is set and the output is enabled (input register 0) the output is switched on if pwm1/2 input is high and switched off if pwm1/2 input is low. out7 is controlled by pwm2 input. all other outputs are controlled by pwm1 input. 0 10 0 / 1 out5 ? hs open-load 9 out7 pwm2 enable out5 ? ls open-load 8 out6 pwm1 enable out4 ? hs open-load 7 out4 ? ls open-load 6 enable high r dson out6 out3 ? hs open-load 5 out5 pwm1 enable out3 ? ls open-load 4 out4 pwm1 enable out2 ?hs open-load 3 out3 pwm1 enable out2? ls open-load 2 out2 pwm1 enable out1 ? hs open-load 1 out1 pwm1 enable out1 ? ls open-load 0 1 no error bit a logical nor- combination of all bits 1 to 22 in both status registers. table 19. spi - input data and status registers 1 (continued) bit input register 1 (write) status register 1 (read) name comment name comment
packages thermal data L9953LXP 30/35 doc id 16185 rev 3 5 packages thermal data figure 10. packages thermal data
L9953LXP package and packing information doc id 16185 rev 3 31/35 6 package and packing information 6.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 6.2 powersso-36 package information figure 11. powersso-36 package dimensions
package and packing information L9953LXP 32/35 doc id 16185 rev 3 table 20. powersso-36 mechanical data symbol millimeters min. typ. max. a2.15 - 2.47 a2 2.15 - 2.40 a1 0 - 0.075 b0.18 - 0.36 c0.23-0.32 d 10.10 - 10.50 e 7.4 - 7.6 e-0.5- e3 - 8.5 - g- -0.1 g1 - - 0.06 h10.1 - 10.5 h- -0.4 l0.55 - 0.85 n- -10 deg x 4.3 - 5.2 y 6.9 - 7.5
L9953LXP package and packing information doc id 16185 rev 3 33/35 6.3 powersso-36 packing information figure 12. powersso-36 tube shipment (no suffix) figure 13. powersso-36 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base qty 49 bulk qty 1225 tube length (0.5) 532 a 3.5 b 13.8 c (0.1) 0.6 a c b base qty 1000 bulk qty 1000 a (max) 330 b (min) 1.5 c (0.2) 13 f 20.2 g (+2 / -0) 24.4 n (min) 100 t (max) 30.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 (0.1) 4 component spacing p 12 hole diameter d (0.05) 1.55 hole diameter d1 (min) 1.5 hole position f (0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 (0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets sealed with cover tape. user direction of feed
revision history L9953LXP 34/35 doc id 16185 rev 3 7 revision history table 21. document revision history date revision description of changes 31-aug-2009 1 initial release. 14-may-2010 2 table 20: powersso-36 mechanical data : ? changed x: minimum value from 4.1 to 4.3 and maximum value from 4.7 to 5.2 ? changed y: minimum value from 6.5 to 6.9 and maximum value from 7.1 to 7.5 19-sep-2013 3 updated disclaimer.
L9953LXP doc id 16185 rev 3 35/35 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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